图 23  (a) 300 nm P(VDF-TrFE)薄膜的电滞回线; (b) P(VDF-TrFE)处于三种极化状态下, P(VDF-TrFE)-MoS2晶体管的Ids-Vds曲线, fresh指未极化状态, P up, P down分别代表极化向上和极化向下状态; (c), (d) P(VDF-TrFE)极化向上和极化向下时器件示意图以及能带图[82]

Fig. 23.  (a) The ferroelectric hysteresis loop 300 nm P(VDF-TrFE) film capacitor; (b) the Ids-Vds characteristics (at ZERO gate voltage) with three states of ferroelectric layer, and the three states are fresh state (ferroelectric layer without polarization), polarization up (polarized by a pulse Vg of –40 V), and polarization down (polarized by a pulse Vg of –40 V) states, respectively; (c), (d) the cross-section structures of the device and equilibrium energy band diagrams of three different ferroelectric polarization states[82].