新版IAR软件打开旧版本创建的项目时出现的三个错误及其解决方案 is too long for segment definition |
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新版IAR软件打开旧版本创建的项目时出现的三个错误及其解决方案 is too long for segment definition
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目录
一、Segment STACK ... is too long for segment definition二、Segment RAM_CODE_FLASH is too long for segment definition.三、Undefined external "?Vxx" referred in AF
一、Segment STACK … is too long for segment definition
Error[e16]: Segment ISTACK (size: 0xc0 align: 0) is too long for segment definition. At least 0x3 more bytes needed. The problem occurred while processing the segment placement command 打开项目设置 修改目标数值，将原有值减去刚提到的至少有的值， 我这里就是(0xc0 - 0x03 = 0xbd) 重新编译即可， 其他类似问题，解决方案也类似。 二、Segment RAM_CODE_FLASH is too long for segment definition.Error[e16]: Segment RAM_CODE_FLASH (size: 0x27 align: 0) is too long for segment definition. At least 0x4 more bytes needed. The problem occurred while processing the segment placement command 打开项目下文件夹： x:\xxx\Projects\zstack\Tools\CC2530DB 找到并编辑此文件 f8w2530.xcl, 记事本/其他任何文本编辑器均可 Error[e46]: Undefined external “?V1” referred in AF ( x:\xxx\ZStack-CC2530-2.3.0-1.4.0\Projects\zstack\Samples\SampleApp\ 在下述目录中找到chipcon_cstartup.s51文件 目录： x:\xxx\ZStack-CC2530-2.3.0-1.4.0\Projects\zstack\ZMain\TI2530DB 由于此方案会修改此文件，请自行备份， 方便回滚 复制下述代码 替换 掉chipcon_cstartup.s51文件中的 全部内容，重新编译即可。 /************************************************************************************************** Filename: chipcon_cstartup.s51 Revised: $Date: 2014-05-01 09:07:13 -0700 (Thu, 01 May 2014) $ Revision: $Revision: 38324 $ Description: Contains the code executed before the C/EC++ "main" function is called. The code is designed to run on any processor based on the 8051 architecture. Copyright 2005-2014 Texas Instruments Incorporated. All rights reserved. IMPORTANT: Your use of this Software is limited to those specific rights granted under the terms of a software license agreement between the user who downloaded the software, his/her employer (which must be your employer) and Texas Instruments Incorporated (the "License"). You may not use this Software unless you agree to abide by the terms of the License. The License limits your use, and you acknowledge, that the Software may not be modified, copied or distributed unless embedded on a Texas Instruments microcontroller or used solely and exclusively in conjunction with a Texas Instruments radio frequency transceiver, which is integrated into your product. Other than for the foregoing purpose, you may not use, reproduce, copy, prepare derivative works of, modify, distribute, perform, display or sell this Software and/or its documentation for any purpose. YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL TEXAS INSTRUMENTS OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS. Should you have any questions regarding your right to use this Software, contact Texas Instruments Incorporated at www.TI.com. **************************************************************************************************/ #include "iar_common.h" MODULE CSTARTUP FUNCTION __program_start,0203H PUBLIC __program_start EXTERN ?B0 EXTERNS_FOR_ALL_DPTR_SYMBOLS() REQUIRE ?B0 REQUIRE __call_main #if (__NUMBER_OF_DPTRS__ > 1) REQUIRE ?RESET_DPS #endif #if (__CORE__ == __CORE_EXTENDED1__) REQUIRE __call_init_extended1 #endif #if (__CORE__ == __CORE_EXTENDED2__) REQUIRE __call_init_extended2 #endif ; Uncomment this when rom-monitor requires 3 NOPS between statements. ; REQUIRE ?ROM_MONITOR_NOPS RSEG REGISTERS:NOROOT:DATA PUBLIC ?REGISTERS ?REGISTERS: //------------------------------------------------------------------------ // The C stack segment. Should be mapped into internal data RAM // // ISTACK: Should be mapped into internal data RAM // PSTACK: Should be mapped into external data RAM page // XSTACK: Should be mapped into external data RAM // EXT_STACK: Should be mapped into external data RAM // //------------------------------------------------------------------------ // The C stack is used for LCALL's and temporary storage for // code generator help-routines (math etc). The stack will be // located after all other internal RAM variables if the stan- // dard linking procedure is followed. Note that C interrupt // routines can double stack size demands. // //------------------------------------------------------------------------ RSEG ISTACK:NOROOT:IDATA PUBLIC ?ISTACK_START ?ISTACK_START: RSEG PSTACK:NOROOT:XDATA PUBLIC ?PSTACK_START ?PSTACK_START: RSEG XSTACK:NOROOT:XDATA PUBLIC ?XSTACK_START ?XSTACK_START: RSEG EXT_STACK:NOROOT:XDATA PUBLIC ?EXT_STACK_START ?EXT_STACK_START: //------------------------------------------------------------------------ // // Define reset vector. // //------------------------------------------------------------------------ COMMON INTVEC:CODE:ROOT(0) // The reset vector must be located at address zero, the reset // vector is located first in the INTVEC segment. This segment // must thus be located at address zero. Be carefull if using // assembler sequences located with the ASEG directive, which may // prevent the INTVEC segment from being located at address zero. // Not enforcing location at address 0 for boot loader for OAD. // LIMIT SFB(INTVEC),0,0,"The INTVEC segment must begin at address zero" ?reset_vector: DB 0x02 ; LJMP #if defined(START_INIT_IN_FAR) DB BYTE3(__program_start) #endif DB high(__program_start) DB low(__program_start) //------------------------------------------------------------------------ // // Initialize the chip to suit IAR ICC8051 Compiler // //------------------------------------------------------------------------ RSEG CSTART:CODE:ROOT EXTERN ?REGISTER_BANK REQUIRE ?REGISTERS REQUIRE ?reset_vector __program_start: MOV PSW,#(?REGISTER_BANK 1) RSEG CSTART:CODE:NOROOT PUBLIC ?RESET_DPS EXTERN ?DPS ?RESET_DPS: MOV ?DPS,#0x00 #endif //------------------------------------------------------------------------ // // Initialize the extended1 core // //------------------------------------------------------------------------ #if (__CORE__ == __CORE_EXTENDED2__) REQUIRE __call_init_extended2 RSEG CSTART:CODE:NOROOT PUBLIC __call_init_extended2 PUBLIC ?MEX1 PUBLIC ?MEX2 PUBLIC ?MEX3 PUBLIC ?MEXSP EXTERN __init_extended2 ?MEX1 EQU 0x94 ?MEX2 EQU 0x95 ?MEX3 EQU 0x96 ?MEXSP EQU 0x97 __call_init_extended2: ;; MEX1 = 0x00 at reset ORL ?MEX1, #(BYTE3(__init_extended2) & 0x0F) LCALL __init_extended2 & 0x00FFFF #endif //------------------------------------------------------------------------ // // Disable the PFLASH cache in Infineon devices that have the hardware // bug. // //------------------------------------------------------------------------ RSEG CSTART:CODE:NOROOT PUBLIC __disable_infineon_pflash __disable_infineon_pflash: DB 0x12 ; LCALL #if defined(START_INIT_IN_FAR) DB 0x00 #endif DB 0xDF DB 0xFC //------------------------------------------------------------------------ // // Jump to the code that performs the rest of the system initialization // before calling main(). // //------------------------------------------------------------------------ RSEG CSTART:CODE:NOROOT EXTERN ?cmain __call_main: LJMP ?cmain ENDMOD __program_start ;----------------------------------------------------------------; ; Virtual registers ; ; ================= ; ; Below is some segment needed for the IAR ICC C/EC++ compiler ; ; ; ; BREG : A segment for 8 bit registers for use by the compiler. ; ; ?B0 is the first register. ; ; VREG : Segment that holds up to 32 virtual registers for ; ; use by the compiler. ?V0 is the first register. ; ; PSP : Segment containing the PDATA stack pointer (?PSP) ; ; XSP : Segment containing the XDATA stack pointer (?XSP) ; ; ; ;----------------------------------------------------------------; ;----------------------------------------------------------------; MODULE VIRTUAL_REGISTERS PUBLIC ?B0 PUBLIC ?V0 PUBLIC ?V1 PUBLIC ?V2 PUBLIC ?V3 PUBLIC ?V4 PUBLIC ?V5 PUBLIC ?V6 PUBLIC ?V7 PUBLIC ?V8 PUBLIC ?V9 PUBLIC ?V10 PUBLIC ?V11 PUBLIC ?V12 PUBLIC ?V13 PUBLIC ?V14 PUBLIC ?V15 PUBLIC ?V16 PUBLIC ?V17 PUBLIC ?V18 PUBLIC ?V19 PUBLIC ?V20 PUBLIC ?V21 PUBLIC ?V22 PUBLIC ?V23 PUBLIC ?V24 PUBLIC ?V25 PUBLIC ?V26 PUBLIC ?V27 PUBLIC ?V28 PUBLIC ?V29 PUBLIC ?V30 PUBLIC ?V31 PUBLIC ?PSP PUBLIC ?XSP RSEG BREG:BIT:NOROOT ?B0: DS 8 RSEG VREG:DATA:NOROOT ?V0: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V0 ?V1: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V1 ?V2: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V2 ?V3: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V3 ?V4: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V4 ?V5: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V5 ?V6: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V6 ?V7: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V7 ?V8: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V8 ?V9: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V9 ?V10: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V10 ?V11: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V11 ?V12: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V12 ?V13: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V13 ?V14: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V14 ?V15: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V15 ?V16: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V16 ?V17: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V17 ?V18: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V18 ?V19: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V19 ?V20: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V20 ?V21: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V21 ?V22: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V22 ?V23: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V23 ?V24: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V24 ?V25: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V25 ?V26: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V26 ?V27: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V27 ?V28: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V28 ?V29: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V29 ?V30: DS 1 RSEG VREG:DATA:NOROOT REQUIRE ?V30 ?V31: DS 1 RSEG PSP:DATA:NOROOT EXTERN ?RESET_PSP REQUIRE ?RESET_PSP ?PSP: DS 1 RSEG XSP:DATA:NOROOT EXTERN ?RESET_XSP REQUIRE ?RESET_XSP ?XSP: DS 2 ENDMOD ; VIRTUAL_REGISTERS ;----------------------------------------------------------------; ; Register banks ; ; ================= ; ; Below is some segment needed for the IAR ICC C/EC++ compiler ; ; ; ; The register banks will only be included if the #pragma ; ; register_bank is used for the corresponding register bank ; ; ; ;----------------------------------------------------------------; MODULE REGISTER_BANK0 PUBLIC __REG_BANK_0 ASEGN __REG_BANK0:DATA,0x00 __REG_BANK_0: DS 8 ENDMOD MODULE REGISTER_BANK1 PUBLIC __REG_BANK_1 ASEGN __REG_BANK1:DATA,0x08 __REG_BANK_1: DS 8 ENDMOD MODULE REGISTER_BANK2 PUBLIC __REG_BANK_2 ASEGN __REG_BANK2:DATA,0x10 __REG_BANK_2: DS 8 ENDMOD MODULE REGISTER_BANK3 PUBLIC __REG_BANK_3 ASEGN __REG_BANK3:DATA,0x18 __REG_BANK_3: DS 8 ENDMOD ; REGISTER_BANK3 END |
文件中查找字段 D_RAM_CODE_FLASH_END, 并修改其值，增加刚提到的少需要的数值(我这里就是0x04了)。 此处红框中的数值便是我加上去的。 
此后保存退出，重新编译。
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