receive channel是什么意思

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receive channel是什么意思

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receive channel receive channel 双语例句 This invention relates to a gas reburning and double-channel rich/lean integrated combustor of low Nox, in which 7 air nozzles and 7 fuel nozzles interlace with each other. The air nozzles are all connected to a bellow and receive air supply from a large tank-type bellow. The fuel nozzles are connected to respective fuel system through the bellow. From up to down, the 7 fuel nozzles are: the gas nozzle, the double-channel up-lean and down-rich coal powder nozzle, the double channel up-rich and down-lean coal powder channel, 3 double-channel level rich/lean coal powder nozzle (the rich phase is near the flame), and the oil nozzle inside the nethermost air nozzle.气体再燃与双通道浓淡集成型低Nox燃烧器,7个空气喷嘴和7个燃料喷嘴交错布置,各空气喷嘴与风箱连接,由一个槽型体大风箱供风,各燃料喷嘴均穿过风箱同各自的燃料系统连接,7个燃料喷嘴从上至下依次排列为:燃气喷嘴、双通道上淡下浓煤粉喷嘴、双通道上浓下淡煤粉喷嘴和3个双通道水平浓淡煤粉喷嘴,燃油喷嘴置于最下边的空气喷嘴中。 If you receive a signal on the current channel then the icon RX will appear.如果您收到一个信号,对当前频道,然后该图标的RX会出现。 When you receive a signal on the current channel, the RX icon is displayed.当您收到在当前渠道时的一个信号,RX象被显示。 78L10 Pinout: One Pulse Width Modulator module with six PWM outputs and one Fault input; fault-tolerant design with dead time insertion; supports both center-aligned and edge-aligned modes Two 12-bit, Analog-to-Digital Converters, which support two simultaneous conversions with dual, 3-pin multiplexed inputs; ADC and PWM modules can be synchronized through Timer C, Channel 2 Temperature Sensor is tied internally to analog input (ANA7) to monitor the on-chip temperature Two 16-bit Quad Timer modules totaling six pins: Timer A works in conjunction with Quad Decoder 0 and Timer C works in conjunction with the PWMA and ADCA One Quadature Decoder which works in conjunction with Quad Timer A FlexCAN (Can Version 2.0 B-compliant) module with 2-pin port for transmit and receive78L10引脚说明:一个脉冲宽度调制器模块,6个PWM输出和一个错误的投入;容错与死区时间插入设计,同时支持中心对齐和边缘对齐方式的两个12位模拟数字转换器,它支持两个同步双,三针复投入; ADC和PWM模块可通过定时器,通道2温度传感器内部联系在一起同步模拟输入(ANA7转换)监测芯片上的温度2个16位定时器模块四,共计6管脚:定时器A的四解码器0和定时器结合工程与工程腺鳞癌1 Quadature PWMA和解码器,这与四定时器A FlexCAN(可2.0版的B -兼容)2模块结合工程一并引脚为发送和接收端口 If the information fields in a mandatory frame on channel does not indicate more information for multichannel selective call receiver in the rest of the mandatory frame, then controller controls receiver to receive information on other channels during the rest of the mandatory frame.如果在该信道上的一个必备帧中的诸信息域不为多信道选呼接收机表明其余的必备帧中的更多的信息,那么控制器控制接收机在其余的必备帧期间接收其它信道上的信息。 I pray to my ancestors in my blood and spiritual families to channel to the people who have made me suffer, the energy of love and protection, so that their hearts will be able to receive the nectar of love and blossom like a flower.我企求历劫父母师长能把力量传给我的冤亲债主,让他们得到爱的滋润,绽放出生命的花朵。 Channel UART 5 V, 3.3 V and 2.5 V operation Industrial temperature range Pin and functionally compatible to 16C2450 and software compatible with INS8250, SC16C550 Up to 5 Mbit/s data rate at 5 V and 3.3 V, and 3 Mbit/s at 2.5 V 16 byte transmit FIFO to reduce the bandwidth requirement of the external CPU 16 byte receive FIFO with error ags to reduce the bandwidth requirement of the external CPU Independent transmit and receive UART control Four selectable Receive FIFO interrupt trigger levels Software selectable Baud Rate Generator Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun Break) Transmit, Receive, Line Status, and Data Set interrupts independently controlled1第1页,本页显示记录1-13,共13条记录分1页显示2通道UART的5伏,3.3 V和2.5 V工作温度范围内工业引脚和功能兼容高达5至16C2450和软件INS8250兼容,SC16C550 Mbit/s的数据速率在5 V和3.3 V和3 Mbit/s的2.5五16字节的发送FIFO,以减少对外部CPU 16字节的FIFO接收错误标志,以减少对外部CPU的带宽要求独立的UART发送和接收控制带宽要求4种可选接收FIFO中断触发水平的软件选择波特率发生器标准异步错误和数据帧位(起始,停止和奇偶超时中断)发送,接收,线路状态和数据设置中断可单独控制 A node uses its seed value and punchout mask to generate a specific randomly ordered channel hopping band plan on which to receive signals.节点利用种子值及频道移除遮罩来产生特定的随机排序的跳频频带规划以接收信号。 A receive from an unbuffered channel happens before the send on that channel completes.从一个unbuffered管道接收数据在向管道发送数据完成之前发送。 If you can lock the radio channel, it is necessary to re-Taiwan found a previously locked channel will not be able to listen to, a place for Taiwan to receive the same frequency changes.如果是可以锁定频道的收音机,就要重新搜台了,以前锁定的频道就不能收听了,换了地方同一个台接收频率是会改变的。 Per Time Slot Looping Any channel or combination of channels may be looped from transmit to receive STBUS channels.每时段的缝盘任何频道或组合的渠道,可 loop处理传输接收 stbus渠道。 This paper analyzed the firstorder statistics of receive data's sequences and deduced a channel estimation algorithm using the property of circulant Toeplitz matrix when using PN sequences as training sequences.从接收信号的一阶统计量入手,并且在训练序列为PN序列下,利用循环To-eplitz矩阵的特性,得到了信道估计的算法。 Clear channel assessment, CCA, is available through an interrupt in receive mode.清楚的渠道评估,CCA,是可利用的通过中断接受方式。 The performance of vertical bell labs layered space-time over receive correlated Rayleigh fading channel is investigated.研究了接收相关瑞利衰落对垂直分层空时码最大似然接收机比特差错性能的影响。 Receiver equalization refers to a method of restoring a signal`s high-frequency components that the media preferentially attenuates. Located at the receive end of the cable, the equalizer compensates the channel loss by boosting the higher frequency components of the signal, thereby minimizing the amplitude difference between the low and high frequency components of the bit stream.传输线均衡器放置于信号的接收端,通过增强信号的高频分量来补偿信号通过介质的损耗,使接收机接收到的信号的高频分量和低频分量的幅度相差最小,减小码间干扰。 MC74F11DR2 Pinout: DMA Controller supports: 25 DMA channels for transfers between ADSP-21365/6 inter- nal memory and a variety of peripherals 32-bit DMA transfers at core clock speed, in parallel with full- speed processor execution Asynchronous parallel port provides access to asynchronous external memory 16 multiplexed address/data lines support 24-bit address external address range with 8-bit data or 16-bit address external address range with 16-bit data 55M byte per sec transfer rate External memory access in a dedicated DMA channel 8- to 32-bit and 16- to 32-bit packing options Programmable data cycle duration: 2 to 31 CCLK Digital Audio Interface includes six serial ports, two Precision Clock Generators, an Input Data Port, three tim- ers, an S/PDIF transceiver, a DTCP cipher (ADSP-21365 only), an 8-channel asynchronous sample rate converter, an SPI port, and a Signal Routing Unit Six dual data line serial ports that operate at up to 50M bits/s on each data line each has a clock, frame sync and two data lines that can be configured as either a receiver or transmitter pair Left-justified Sample Pair and I2S Support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for newer telephony interfaces such asMC74F11DR2引脚说明:DMA控制器支持:25 DMA通道之间的ADSP -6分之21365跨宇空内存和各种外设的32位DMA传输在传输中的核心时钟速度全速执行并行处理器,异步并行端口提供访问外部内存16异步多路复用地址/数据线支持8位数据或16位数据16位地址的外部地址范围的24位地址的外部地址范围55米每秒传输字节率在一个专用的外部DMA通道内存访问8 - 32位和16 -位到32位可编程数据包装周期时间的选择:2至31个CCLK数字音频接口包括6个串行端口,两个精密时钟发生器,输入数据端口,3个添,雇员再培训计划,一个S/PDIF收发器,一个的DTCP加密(的ADSP - 21365只),8通道异步采样率转换器,一个SPI端口和信号路由组六双串口数据线,在高达50米位操作/每个数据线每个人都有一个时钟,帧同步和两个数据可以作为一个接收器或任何配置s光发射线对左合理的样本配对和I2S支持,可编程的方向,同时接收多达24个或传输渠道,每使用两个串口的I2S兼容的立体声设备的通讯接口,其中包括128个较新的电话接口的TDM通道支持TDM支持;如 The cerebro-spinal is the channel through which we receive conscious perception from the physical senses and exercise control over the movements of the body.我们需要把它们变成自发的意识,或者说潜识,这样就可以把我们的自我意识解放出来,关注其他。 MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also availableMAX1999EEI引脚说明:8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口,3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I/O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可 TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also availableTDA4864引脚说明:8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口,3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I/O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可 In 3.x, the only way to receive the packet at the beginning of the reception was to set the channel datarate to zero and calculate the duration manually -- this workaround is no longer needed.在3.x的版本中,在接收开始的时候只有一个方法可以接收数据包就是设定信道数据传输率为0并且手动计算持续时间--这种工作策略我们已经不再需要了。 receive channel 中文翻译 1 接收信道 相关单词 receive channel 相关单词辨析 take, accept, admit, receive 的区别和用法

这组词都有“接受、接纳”的意思,其区别是: take: 与receive同意,是receive的日常用法,侧重不带主观意愿地收下或接受。 accept: 强调主动地或自愿地接受,或者说,经过考虑后同意接受。 admit: 作“接受”讲时,强调准许或批准。 receive: 着重仅仅接到或收到这一支轮船或事实,而不含采取主动或积极行动的意思。

motorway(free way,express way), vessel, pavement(sidewalk), highway, route, trail, street, way, road, channel, lane 的区别和用法

motorway(free way,express way): 高速公路; vessel: 血管,管道,一般指细小管道; pavement(sidewalk): 街道两旁的人行道; highway: 通常指市区外可以通行各种机动车辆的交通干线; route: 路线,航线;path:乡间小路,公园小径; trail: 指人或兽在森林、荒野或山中踩出的小径或崎岖小道 street: 尤指城市中的道路; way: 可指各种路、道或通道,也可指抽象的道路、方法; road: 广阔平坦的大道,多指公路; channel: 海峡,渠道,管道; lane: 指农村或城镇的小道或小径,也指小巷;

strait, channel 的区别和用法

这组词都有“海峡”的意思,其区别是: strait: 指短而窄的海峡。常用复数形式但作单数用。 channel: 指比strait长而宽的海峡。



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